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Contents
In modern electronic systems, power efficiency is a critical consideration. To address this concern, the AXI (Advanced eXtensible Interface) protocol includes a Low Power Interface that allows peripherals to enter low-power states when not in use.
1. CSYSREQ - System Low-Power Request
The CSYSREQ signal is a request from the system clock controller to a peripheral, indicating the need to enter a low-power state. It serves as a trigger for peripherals that require a power-down sequence before their clocks can be turned off. The CSYSREQ signal initiates the power-down sequence, enabling the peripheral to conserve power when not actively processing data.
2. CSYSACK - Low-Power Request Acknowledgement
The CSYSACK signal is the acknowledgement from a peripheral in response to a system low-power request. Once the peripheral receives the CSYSREQ signal, it sends the CSYSACK signal to indicate its compliance with the request. This acknowledgment allows the system clock controller to ensure that the peripheral has successfully entered the low-power state.
3. CACTIVE - Clock Active
The CACTIVE signal is used by peripherals to indicate their clock requirements. It serves as a communication mechanism between the peripheral and the system clock controller. When the CACTIVE signal is set to '1', it signifies that the peripheral requires its clock signal to be active. Conversely, when the CACTIVE signal is set to '0', it indicates that the peripheral does not need its clock signal.
4. Acceptance of low-power request
5. Denlal of a low-power request
The Purpose of the Low Power Interface
The AXI Low Power Interface is designed to cater to two different classes of peripherals:
Peripherals with Power-Down Sequences
Certain peripherals have specific power-down sequences that need to be followed before their clocks can be turned off. These peripherals rely on the CSYSREQ signal from the system clock controller to initiate the power-down sequence. Once the power-down sequence is completed, these peripherals can enter a low-power state, conserving energy by turning off their clocks until the CSYSREQ signal is received again.
Peripherals without Power-Down Sequences
On the other hand, some peripherals do not have a power-down sequence. These peripherals can independently determine when it is acceptable to turn off their clocks. They utilize the CSYSREQ and CSYSACK signals to coordinate with the system clock controller and enter the low-power state when deemed appropriate. This flexibility allows them to optimize power consumption without the need for a predefined power-down sequence.
Conclusion
The AXI Low Power Interface provides a means for peripherals to conserve power in modern electronic systems. By utilizing signals such as CSYSREQ, CSYSACK, and CACTIVE, the interface enables peripherals to enter low-power states and turn off their clocks when not actively processing data.
